/********************************************/
/*71V30 Dual Port RAM Configuration Code    */
/*dsPIC33CK512MP608                         */
/********************************************/

#include "xc.h"
#include "dsPIC33_REN71V30.h"
 
void dsPIC33_REN71V30_Init(void)
{    
    //RB5 = SRAM /CS (output)
    TRISBbits.TRISB5 = 0;
    PORTBbits.RB5 = 1;

    //Configure SRAM INT pin RE0 (input)
    TRISEbits.TRISE0 = 1;
    ANSELEbits.ANSELE0 = 0;

    //Configure SRAM BUSY pin RE1 (input)
    TRISEbits.TRISE1 = 1;
    ANSELEbits.ANSELE1 = 0;
    
    //make sure INTL is high
    PMADDR = 0x3fe;    
    // /CS1
    PORTBbits.RB5 = 0;        
    //dummy read
    mdata_71v30 = PMDIN1;
    while(PMMODEbits.BUSY == 1);
    mdata_71v30 = PMDIN1;
    while(PMMODEbits.BUSY == 1);
    // /CS1
    PORTBbits.RB5 = 1;
    
    //Lock out
    TRISEbits.TRISE3 = 0;
    PORTEbits.RE3 = 0;
    
    sram_lock = 0;
    sram_block = 0xff;
    
    return;
}

int dsPIC33_REN71V30_WR(int address_71v30, int wrdata_71v30)
{            
//    int d;
    
    PMADDR = address_71v30;
    
    // /CS 
    PORTBbits.RB5 = 0;
    
    PMDIN1 = wrdata_71v30;
    while(PMMODEbits.BUSY == 1);
    
//    d = mdata_71v30;
//    
//    if(d != mdata_71v30)
//    {
//        return 0;
//    }
//
//    mdata_71v30 = PMDIN1;
//    while(PMMODEbits.BUSY == 1);
//   
//    mdata_71v30 = PMDIN1;
//    while(PMMODEbits.BUSY == 1);

    // /CS1
    PORTBbits.RB5 = 1;
    
    return 1;
}

void dsPIC33_REN71V30_RD(int address_71v30)
{    
    PMADDR = address_71v30;
    
    // /CS1
    PORTBbits.RB5 = 0;
        
    //dummy read
    mdata_71v30 = PMDIN1;
    while(PMMODEbits.BUSY == 1);
   
    mdata_71v30 = PMDIN1;
    while(PMMODEbits.BUSY == 1);

    // /CS1
    PORTBbits.RB5 = 1;
    
    return;
}

void dsPIC33_memtest_71V30(void)
{
    int a;
    int b;
    /////////////////////////////
    //SRAM write all zeros
    ////////////////////////////
    b = 0;
    for(a=0;a<1024;a++)
    {
        PMADDR = a;
        // /CS1 
        PORTBbits.RB5 = 0;

        mdata_71v30 = b;
        PMDIN1 = mdata_71v30;
        while(PMMODEbits.BUSY == 1);

        // /CS1
        PORTBbits.RB5 = 1;
    }
    /////////////////////////////
    
    //SRAM read and verify 
    for(a=0;a<1024;a++)
    {
        PMADDR = a;
        address_71v30 = a;
        mdata_71v30 = 0;
        // /CS1
        PORTBbits.RB5 = 0;

        //dummy read
        mdata_71v30 = PMDIN1;
        while(PMMODEbits.BUSY == 1);

        mdata_71v30 = PMDIN1;
        while(PMMODEbits.BUSY == 1);

        if(mdata_71v30 != b)
        {
            sram_test = 0;
            sram_test_data[a] = 0;
        }
        else
        {
            sram_test = 1;
            sram_test_data[a] = 1;
        }
        // /CS1
        PORTBbits.RB5 = 1;
    }

    return;
}