A Stackable Platform for Embedded Development and Control

MainBrain is a small single-board high performance 32-bit RISC MIPS32 M4K Core based computer that interfaces to a 'stack' of one or more secondary interface boards. High speed communication (~1MB/S) between MainBrain and the interface boards is implemented through a dual RAM port. This creates an 8K x 8 register bank that can be continually updated by the MCU and read by the interface boards (and vice versa) at virtually the same time.

The two RAM ports are provided with separate control, address and I/O pins that permit independent access for reads or writes to any location in port memory. One port is accessed by the MCU while the second port is accessed by the primary interface board. Busy Logic provides a hardware indication that both ports of the SRAM have accessed the same location at the same time. It also allows one of the two accesses to proceed and signals the other side that the SRAM is busy.

The 34-pin I/O connector provides an interface with address and data buses for 8-bit bidirectional data transfer with the Dual Port RAM, as well as, RD/WR, CS, OE, and Busy control signals. Five general purpose user programmable I/O lines are provided to enhance control of external devices. The 3.3V from the onboard buck regulator is also provided. Additionally, the input voltage and reset signal are provided to give maximal functionality.

A USB interface can be used to update the firmware and download application code. Royalty free USB code provide for a very easy development.

  • Develop embedded systems utilizing user developed stackable interface boards
  • Operates on 5 - 24VDC @ < 100 mA
  • 2.5" x 3.8" (63.5mm x 96.5mm)
  • 32-bit 80 MHz/105 DMIPS MIPS32 M4K Core Processor
  • Onboard 320 x 480 TFT Touch display
  • 8 LED Status Port
  • USB interface
  • 34-pin I/O Interface
  • 8K X 8 Dual Port Static RAM
  • 4 Mbit, 512K x 8 Onboard Flash
  • 256 Kb Internal Flash with 12 Kb of Boot Flash and 64K Data RAM
  • Real Time Clock
  • Onboard current and volatge monitoring
  • 10-Bit ADC
  • In Circuit Debugging and JTAG Support
I reserve all my legal rights to the original content provided on this page. Everything listed on this page is free to use with the agreement that my name, Larry Knight, is included with every article and listed as the sole owner and that no profits shall be taken without written permission. MainBrain is an originl name created by myself and shall not be used with out permission.
[an error occurred while processing this directive]